PHT.301 Physics of Semiconductor Devices
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PHT.301 Physics of Semiconductor Devices | |
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n-channel JFETThe expression for the drain current of a n-channel JFET in the linear regime is, \[ \begin{equation} I_D=I_p\left[\frac{V_D}{V_p}-\frac{2}{3}\left(\frac{V_{bi}+V_D-V_G}{V_p}\right)^{3/2}+\frac{2}{3}\left(\frac{V_{bi}-V_G}{V_p}\right)^{3/2}\right], \end{equation} \]where, \begin{align} I_p =\frac{\mu_n {N_D}^2 Z e^2 h^3}{2L\epsilon_r\epsilon_0} \qquad V_p =\frac{e {N_D} h^2}{2 \epsilon_r\epsilon_0} \qquad eV_{bi} =k_B T \ln \left(\frac{N_A N_D}{{n_i}^2}\right) \qquad n_i=\sqrt{N_cN_v\left(\frac{T}{300}\right)^{3}}\exp\left(\frac{-E_g}{2k_BT}\right). \end{align}In the saturation regime the current is, \[ \begin{equation} I_D=I_p\left[\frac{1}{3}-\frac{V_{bi}-V_G}{V_p}+\frac{2}{3}\left(\frac{V_{bi}-V_G}{V_p}\right)^{3/2}\right]. \end{equation} \]These expressions are valid assuming that the pn junction is reverse biased. For a n-channel JFET, $V_G$ < 0 and $V_D$ > 0 in this regime.
$E_g=$ eV; $n_i=$ cm-3; $V_{bi}=$ V; $I_p=$ A; $V_p=$ V. |